A Cathode Ray Tube (CRT) display generally provides the best brightness, highest contrast, best color quality and largest viewing angle of prior art computer displays. CRT displays typically use a layer of phosphor which is deposited on a thin glass faceplate. These CRTs generate a picture by using one to three electron beams which generate high energy electrons that are scanned across the phosphor in a raster pattern. The phosphor converts the electron energy into visible light so as to form the desired picture. However, prior art CRT displays are large and bulky due to the large vacuum envelopes that enclose the cathode and extend from the cathode to the faceplate of the display. Therefore, typically, other types of display technologies such as active matrix liquid crystal display, plasma display and electroluminescent display technologies have been used in the past to form thin displays.
Recently, a thin flat panel display (FPD) has been developed which uses the same process for generating pictures as is used in CRT devices. These flat panel displays use a backplate including a matrix structure of rows and columns of electrodes. One such flat panel display is described in U.S. Pat. No. 5,541,473 which is incorporated herein by reference. Flat panel displays are typically matrix-addressed and they comprise matrix addressing electrodes. The intersection of each row line and each column line in the matrix defines a pixel, the smallest addressable element in an electronic display.
The essence of electronic displays is the ability to turn on and off individually picture elements (pixels). A typical high information content display will have about a quarter million pixels in a 33 cm diagonal orthogonal array, each under individual control by the electronics. The pixel resolution is normally just at or below the resolving power of the eye. Thus, a good quality picture can be created from a pattern of activated pixels.
One means for generating arrays of field emission cathode structures relies on well established semiconductor micro-fabrication techniques. These techniques produce highly regular arrays of precisely shaped field emission tips. Lithography, generally used in these techniques, involves numerous processing steps, many of them wet. The number of tips per unit area, the size of the tips, and their spacing are determined by the available photo-resist and the exposing radiation.
Tips produced by the method are typically cone-shaped with base diameters on the order of 0.5 to 1 um, heights of anywhere from 0.5 to 2 um, tip radii of tens of nanometers. This size limits the number of tips per pixel possible for high-resolution displays, where large numbers (400–1000 emitters per pixel) are desirable for uniform emission to provide adequate gray levels, and to reduce the current density per tip for stability and long lifetimes. Maintaining two dimensional registry of the periodic tip arrays over large areas, such as large TV-sized screens, can also be a problem for gated field emission constructions by conventional means, resulting in poor yields and high costs.
U.S. Pat. No. 4,338,164 describes a method of preparing planar surfaces having a micro-structured protuberances thereon comprising a complicated series of steps involving irradiation of a soluble matrix (e.g., mica) with high energy ions, as from a heavy ion accelerator, to provide column-like traces in the matrix that are subsequently etched away to be later filled with an appropriate conductive, electron-emitting material. The original soluble material is then dissolved following additional metal deposition steps that provide a conductive substrate for the electron emitting material. The method is said to produce up to 106 emitters per cm2, the emitters having a diameter of approximately 1–2 um.
U.S. Pat. No. 5,266,530 describes a gated electron field emitter prepared by a complicated series of deposition and etching steps on a substrate, preferably crystalline.
Carbon, the most important constituent element, which is combined with oxygen, hydrogen, nitrogen and the like, of all organisms including the human body, has four unique crystalline structures including diamond, graphite and carbon. Carbon nano-tubes can function as either a conductor or a semi-conductor according to the constituents of the tube. A conventional approach of fabricating carbon nanotubes is described in an article entitled “epitaxial carbon nanotube film self-organized by sublimation decomposition of silicon carbide” (Appl. Phys. Lett. Vol. 77, pp. 2620, 1997), by Michiko Kusunoky. In the conventional approach, the carbon nanotubes are produced at high temperatures by irradiating a laser onto a graphite silicon carbide. In this particular approach, the carbon nanotubes are produced from graphite at about 1200° C. or more and for silicon carbide at a temperature range of about 1600° C. to 1700° C. However, this method requires a multi-stage approach of deposition of the carbon material. This method is, from a manufacturing perspective, costly and cumbersome.
Another conventional approach is to grow the carbon nanotubes on a silicon substrate. This approach requires that the carbon nanotube material be deposited at temperature higher than 700° C. to ensure a purified and defect-free vertically aligned carbon nanotube structure.
Any attempt to grow the carbon nanotube structure at temperatures below 700° C. results in a defective structure. This conventional approach also results in the inability to control the height of the carbon structure.
Attempts to grow carbon nanotubes at lower temperatures in the prior art have further resulted in non-uniform and repetitive deposition of the emissive carbon nanotubes. Prior art attempts to grow carbon nanotubes have been unsuccessful due to the low surface diffusion of the underlying substrate with the carbon material used for growing the carbon nanotubes.
FIG. 1 is an illustration of a prior art carbon nanotube structure. The carbon nanotube structure shown in FIG. 1 comprises a silicon film substrate 11 with a catalyst metal layer 13 upon which carbon nanotube layer 15 is deposited. The catalyst layer 13 diffuses into the silicon layer 11 during the growing of the carbon nanotube layer 13. This results in a metal-induction crystallized polysilicon layer 14. The carbon nanotube layer 15 is grown by a plasma deposition and etching method at temperatures ranging from 700° C. to 1700° C. The plasma density in this approach ranges from a high density of 1011 cm3 or more. In the structure in FIG. 1, the diffusion of the catalyst layer 13 into the silicon layer 11 results in a high amount of carbon material being deposited to form the nanotube structure.
FIG. 2 is another prior art structure in which the carbon nanotube is grown at a temperature lower than 700° C. In the structure shown in FIG. 2, the carbon nanotube formed is defective and it is difficult to control the height of the structure resulting in a “spaghetti” like structure being formed. The resulting structure of the carbon nanotube in FIG. 2 is due to the insufficient surface temperature characteristics of the silicon substrate at lower temperatures, the lower driving energy to grow the nanotubes and the dramatic growth of the nanotubes at a lower temperature within a short period of time.